Display panel and manufacturing method thereof, display device

ABSTRACT

A display panel, a manufacturing method thereof and a display device are provided. A dustproof construction is provided at a peripheral region of the display panel, and the dustproof construction is located on the outer side of the display region on the display panel, and on the inner side of an outer edge of a sealant applying region. The dustproof construction includes a first electrode, a second electrode and an insulating layer interposed between the first electrode and the second electrode; wherein, slits are arranged in the second electrode. With the display panel and manufacturing method thereof and the display device, impurity ions from outside or in the sealant can be prevented from entering the display region, so that the peripheral badness of the display is improved.

The application is a U.S. National Phase Entry of InternationalApplication No. PCT/CN2014/081125 filed on Jun. 30, 2014, designatingthe United States of America and claiming priority to Chinese PatentApplication No. 201310513051.X filed on Oct. 25, 2013, 2014. The presentapplication claims priority to and the benefit of the above-identifiedapplications and the above-identified applications are incorporated byreference herein in their entirety.

TECHNICAL FIELD

Embodiments of the present invention relate to a display panel and amanufacturing method thereof, a display device.

BACKGROUND

A panel formation procedure is one step that is relatively importantduring manufacture of a liquid crystal display, and it is chiefly that,after an array substrate 10 and a color filter substrate 20 made byfront-end procedures are subjected to an aligning treatment, positionalignment and bonding, liquid crystals are injected. However, asillustrated in FIG. 1, in this procedure, liquid crystals at aperipheral display region 13 may often be polluted as a result ofimpurity ions 11 from outside or in a sealant 12 entering the peripheraldisplay region 13, and peripheral badness of the liquid crystal displayresults from this very easily.

Modified methods available now are generally classified into twocategories: firstly, in terms of process, the contact time of an uncuredsealant with liquid crystals is decreased as far as possible, so as toalleviate the pollution caused by the fact that impurity ions in asealant enter liquid crystals; secondly, in terms of material, a sealantthat brings little pollution to liquid crystals and has a good barrierproperty to foreign impurities is developed, so as to lessen thecircumjacent pollution. The inventors consider that the existingmodified methods suffer from the following deficiencies. At first, atthe present stage, contact of an uncured sealant with liquid crystalscannot be avoided with the technological level, and especially forsmall-size products, the contact is more difficult to be avoided.Secondly, the sealant material has a long developing cycle, andmoreover, preponderant characteristics of the material in other aspectsmay also be sacrificed.

SUMMARY

According to an embodiment of the present invention, there is provided adisplay panel that comprises a display region and a peripheral regionsurrounding the display region, the peripheral region comprising asealant applying region, wherein, a dustproof construction is providedat the peripheral region of the display panel, and the dustproofconstruction is located on an outer side of the display region and on aninner side of an outer edge of the sealant applying region; thedustproof construction comprises a first electrode, a second electrodeand an insulating layer interposed between the first electrode and thesecond electrode; with the second electrode has slits arranged therein.

In an example, the display panel comprises an array substrate thatcomprises a pixel electrode and a common electrode; the first electrodeand the pixel electrode are disposed in a same layer, the secondelectrode and the common electrode are disposed in a same layer; or, thefirst electrode and the common electrode are disposed in a same layer,the second electrode and the pixel electrode are disposed in a samelayer.

In an example, the second electrode comprises a plurality of stripelectrodes.

In an example, the strip electrodes each have a width in a range of 3 to5 μm, and an interval between the strip electrodes that are adjacent isin a range of 5 to 7 μm.

In an example, the first electrode is a plate-like electrode.

In an example, the dustproof construction is apart from the displayregion at least 200 μm.

In an example, the dustproof construction has a distribution areaoverlapping with a part of the sealant applying region.

In an example, the dustproof construction is distributed within a rangeof being apart from the display region 200 to 300 μm and being apartfrom the outer edge of the sealant applying region 200 to 300 μm.

In an example, at the peripheral region of the display panel, there arefurther provided a first electric field control line and a secondelectric field control line that extend to a test connection region ofthe display panel; the first electrode and the second electrode areconnected to the first electric field control line and the secondelectric field control line, respectively.

In an example, the first electrode has a thickness in a range of 400 to600 angstroms.

In an example, the second electrode has a thickness in a range of 400 to600 angstroms.

In an example, the insulating layer has a thickness in a range of 4000to 6000 angstroms.

According to an embodiment of the invention, there is further provided adisplay device, comprising the display panel as stated by any item.

In another aspect, according to an embodiment of the invention, there isfurther provided a manufacturing method of a display panel, comprisingfabricating a color filter substrate, fabricating an array substrate andcell-assembling the color filter substrate and the array substrate,wherein, fabricating the array substrate comprises:

forming a gate metal layer, a gate insulating layer, a source/drainmetal layer and a passivation layer on a substrate in sequence;

forming a first transparent conductive film on the substrate with thegate metal layer, the gate insulating layer, the source/drain metallayer and the passivation layer formed thereon; and through a patterningprocess, forming a pixel electrode or a common electrode at a presetdisplay region, and forming a first electrode on an outer side of thepreset display region and on an inner side of an outer edge of a presetsealant applying region;

forming an insulating layer;

forming a second transparent conductive film; and through a patterningprocess, forming the common electrode or the pixel electrode at thedisplay region, and meanwhile, forming a second electrode on the outerside of the display region and on the inner side of the outer edge ofthe preset sealant applying region, with slits arranged in the secondelectrode.

In an example, cell-assembling the color filter substrate and the arraysubstrate comprises:

applying a drive voltage to the first electrode and the secondelectrode;

applying a sealant at edges of a color filter substrate or an arraysubstrate, and performing cell-assembling;

removing the drive voltage, after the sealant is solidified completely.

With respect to the display panel and manufacturing method thereof andthe display device provided by embodiments of the invention, a dustproofconstruction constituted by electrodes in two layers (the first andsecond electrodes) is provided on the periphery of the display panel,wherein slits are arranged in the second electrode located on top. Afringe electric field formed by the first electrode and the secondelectrode can act to bind the impurity ions from outside and inside thesealant in the slits of the second electrode, and it is prevented thatthese impurity ions enter into a display region and thus an abnormalityin display results from it. Thus, the peripheral badness of the displayis improved.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to illustrate the technical solution of the embodiments of theinvention more clearly, the drawings of the embodiments will be brieflydescribed below; it is obvious that the drawings as described below areonly related to some embodiments of the invention, but not limitative ofthe invention.

FIG. 1 is a schematic view illustrating entrance of impurity ions into aperipheral display region of a display panel in prior art;

FIG. 2 is a structurally schematic view illustrating the periphery of adisplay panel;

FIG. 3 is a structurally schematic view illustrating the periphery of adisplay panel provided by Embodiment 1 of the invention;

FIG. 4 is a first schematic view illustrating the distribution of adustproof construction on the periphery of a display panel according tothe Embodiment 1 of the invention;

FIG. 5 is a schematic view illustrating the working mechanism of adustproof construction on the periphery of a display panel according tothe Embodiment 1 of the invention;

FIG. 6 is a second schematic view illustrating the distribution of adustproof construction on the periphery of a display panel according tothe Embodiment 1 of the invention.

DETAILED DESCRIPTION

In order to make objects, technical details and advantages of theembodiments of the invention apparent, hereinafter, the technicalsolutions of the embodiments of the invention will be described in aclearly and fully understandable way in connection with the drawingsrelated to the embodiments of the invention. It is obvious that thedescribed embodiments are just a part but not all of the embodiments ofthe invention. Based on the described embodiments of the invention,those ordinarily skilled in the art can obtain other embodiment(s),without any inventive work, which should be within the scope sought forprotection by the invention.

Embodiment 1

For example, a sealant applying region on the periphery of a displayproduct may be provided with a control switch for a peripheral circuit,and as illustrated in FIG. 2, its exemplified structure comprises asubstrate 21, and a gate metal (Gate) layer 22, a gate insulating layer(GI) 23, a source/drain metal (S/D) layer 24 and a passivation layer(PVX) 25 located on the substrate 21 in sequence. The gate metal layer22 and the source/drain metal layer 24 are communicated by connection ofa gate-insulating-layer via hole (a GI via hole), so as to function asthe control switch for the peripheral circuit.

According to an embodiment of the invention, there is provided a displaypanel. For example, the display panel comprises a display region and aperipheral region surrounding the display region, and the peripheralregion comprises a sealant applying region. At the peripheral region ofthe display panel, there is provided a dustproof construction 30; thedustproof construction 30 is located on the outer side of the displayregion on the display panel, and on the inner side of an outer edge ofthe sealant applying region. Referring to that illustrated in FIG. 3,the dustproof construction 30 comprises a first electrode 26, a secondelectrode 28 and an insulating layer 27 interposed between the firstelectrode 26 and the second electrode 28. Slits are arranged in thesecond electrode 28.

A dustproof construction constituted by electrodes in two layers (thefirst and second electrodes) is provided on the periphery of the displaypanel in the embodiment. Upon a drive voltage being applied across thefirst electrode and the second electrode, impurity ions from outside orinside the sealant may gather in the slits of the second electrode alongwith an electric field, and it is prevented that they move freely intoliquid crystals and thus an abnormality in peripheral display resultsfrom it. Please refer to FIG. 5 for its mechanism.

Slits are arranged in the second electrode 28 located on top, and thereis no limit on the specific shape of slits. That illustrated in FIG. 3is merely an exemplary structure of the embodiment, and specifically,the case is that the second electrode 28 comprises a plurality of stripelectrodes. For example, the strip electrodes each have a width in therange of 3 to 5 μm, and the interval between the strip electrodes thatare adjacent is in the range of 5 to 7 μm.

In accordance with specific requirements of the peripheral design, thefirst electrode 26 of the embodiment may adopt a layer-shaped orstrip-shaped design. It is also possible that as illustrated in FIG. 3,the first electrode 26 is a plate-like electrode.

A fringe electric field is formed on the periphery of the display panelby the first electrode and the second electrode of the dustproofconstruction, and acts to tie down impurity ions from outside and insidethe sealant, and then, it is prevented that these impurity ions enterthe display region and bring about an abnormality in display. But at thesame time, in order to avoid the fringe electric field from bringing aneffect on liquid crystals within the display region close to theperiphery of the display panel, the dustproof construction 30 should beapart from the display region at least 200 μm. On the other side of thedustproof construction, the distributional area of the dustproofconstruction may overlap with a part of the sealant applying region.

For example, in an exemplary structure of the embodiment, the dustproofconstruction is distributed within a range of being apart from thedisplay region 200 to 300 μm and being apart from an outer edge of thesealant applying region 200 to 300 μm. In some examples, the dustproofconstruction is distributed within a range of being apart from thedisplay region 250 μm and being apart from an outer edge of the sealantapplying region B-B′ 250 μm, as denoted by region A-A′ in FIG. 4.

Optionally, the first electrode 26 as stated above has a thickness inthe range of 400 to 600 angstroms, the second electrode 28 has athickness in the range of 400 to 600 angstroms, and the insulating layer27 has a thickness in the range of 4000 to 6000 angstroms. For example,the first electrode 26 has a thickness of 400 angstroms, the secondelectrode 28 has a thickness of 600 angstroms, and the insulating layer27 has a thickness of 5000 angstroms.

As for a liquid crystal display in a lateral field display mode, suchas, an ADS (Advanced Super Dimension Switch) mode, or an IPS (In-PlaneSwitching) mode, because a pixel electrode and a common electrode of itare each disposed on an array substrate, the first electrode 26 and thesecond electrode 28 in the embodiment may be formed synchronously withthe pixel electrode and the common electrode, respectively.

In some embodiments, the display panel comprises an array substrate,which comprises a pixel electrode and a common electrode. Upon thecommon electrode being on top and the pixel electrode is underneath, thefirst electrode 26 and the pixel electrode are disposed in the samelayer, while the second electrode 28 and the common electrode aredisposed in the same layer. Upon preparation, the first electrode 26 andthe pixel electrode are formed synchronously by etching a firsttransparent conductive film (1st ITO), and the second electrode 28 andthe common electrode are formed by etching a second transparentconductive film (2st ITO). Alternatively, upon the pixel electrode beingon top and the common electrode is underneath, the first electrode 26and the common electrode are disposed in the same layer, while thesecond electrode 28 and the pixel electrode are disposed in the samelayer. Upon preparation, the first electrode 26 and the common electrodeare formed by etching a first transparent conductive film (1st ITO), andthe second electrode 28 and the pixel electrode are formed by etching asecond transparent conductive film (2st ITO), as illustrated in FIG. 5.An insulating layer 27 is provided between the pixel electrode and thecommon electrode, and it may also be called as a second passivationlayer (PVX).

The array substrate illustrated in FIG. 5 further comprises a gate metal(Gate) layer 22, a gate insulating layer (GI) 23, a source/drain metal(S/D) layer 24 and a passivation layer (PVX) 25 located on a substrate21 sequentially.

The dustproof construction of the display panel as stated in theembodiment may be formed synchronously with a procedure substantiallythe same as that in prior art, without the necessity of adding aprocedure additionally for the dustproof construction.

A specific embodiment is illustrated in FIG. 6, and as denoted by A-A′in the figure, a dustproof construction is far away from a displayregion 13. Generally speaking, the distance from the dustproofconstruction to an edge of the display region 13, i.e., width of aregion C-C′ in which no electric field is arranged is ¼ to ⅙ of thewidth of a sealant applying region B-B′ (namely, the glue width).Further, at a peripheral region of the display panel, there are furtherprovided a first electric field control line 15 and a second electricfield control line 16 that extend to a test connection region of thedisplay panel. The first electrode 26 and the second electrode 28 areconnected to the first electric field control line 15 and the secondelectric field control line 16 (collectively called as “electric fieldcontrol lines”), respectively.

The first electrode 26 and the second electrode 28 are connected to theelectric field control lines at the outer side, respectively, each ofthe electric field control lines on the periphery of the display panelis finally integrated into the test connection region (test pad region)of the array substrate, and switch is separately arranged independentlyfrom the other circuit. A drive voltage is applied across the firstelectrode 26 and the second electrode 28 by the first electric fieldcontrol line 15 and the second electric field control line 16, so as togenerate a fringe electric field for binding the impurity particles. Thefringe electric field is applied before or after cell-assembling ofsubstrates, and this can prevent small polar molecules in impurity fromdiffusing from the uncured sealant to liquid crystals. Only after thesealant is fully solidified, the fringe electric field can be removed.

It is to be noted that, when the screen is lit up and a normal displayis performed on it, a fringe electric field generated by the dustproofconstruction should be maintained closed, so as not to produceinterference to other circuit.

With respect to the display panel provided by embodiments of theinvention, a dustproof construction constituted by electrodes in twolayers (the first and second electrodes) is provided on the periphery ofthe display panel, so that impurity ions from outside and inside thesealant can be bound in slits of the second electrode. As such, it isprevented that these impurity ions enter into a display region and thusan abnormality in display results from it. Thus, the peripheral badnessof the display is improved.

According to an embodiment of the invention, there is further provided adisplay device, which comprises any of the display panels as statedabove. With the display panel, owing to provision of the dustproofconstruction, it can be prevented that impurity ions enter a displayregion and bring about an abnormality in display, so as to improve theperipheral badness of the display. Thus, a higher display quality can beachieved. The display device may be a liquid crystal panel, anelectronic paper, an OLED panel, a cell phone, a tablet computer, atelevision, a display, a notebook computer, a digital photo frame, anavigator or any other product or component having a display function.

Embodiment 2

On the other hand, according to an embodiment of the invention, there isfurther provided a manufacturing method of a display panel, whichcomprises a color-filter-substrate process, an array-substrate processand a color-filter-substrate and array-substrate cell-assemblingprocess. The array-substrate process comprises:

101, a gate metal layer, a gate insulating layer, a source/drain metallayer and a passivation layer are formed on a substrate in sequence;

102, a first transparent conductive film is formed on the substrate withthe gate metal layer, the gate insulating layer, the source/drain metallayer and the passivation layer formed thereon, and through a patterningprocess, a pixel electrode or a common electrode is formed at a presetdisplay region, and a first electrode is formed to be located on theouter side of the preset display region and on the inner side of anouter edge of a preset sealant applying region;

103, an insulating layer is formed;

104, a second transparent conductive film is formed, and through apatterning process, a common electrode or a pixel electrode is formed atthe preset display region, and meanwhile, a second electrode with slitsarranged therein is formed to be located on the outer side of thedisplay region and on the inner side of an outer edge of the presetsealant applying region;

Upon the pixel electrode being formed by the first transparentconductive film, the common electrode is formed by the secondtransparent conductive film; upon the common electrode being formed bythe first transparent conductive film, the pixel electrode is formed bythe second transparent conductive film.

Referring to that illustrated in FIG. 5, in the embodiment, a gate metallayer, a gate insulating layer, a source/drain metal layer and apassivation layer (or an insulating layer) are formed sequentially on asubstrate, and next, a 1st ITO (first transparent conductive film), aninsulating layer and a 2nd ITO (second transparent conductive film) arefabricated on the passivation layer (details are as follows). Next, asfor the structure that the common electrode is on top and the pixelelectrode is underneath, a first transparent conductive film (1st ITO)is formed, and etched to form a first electrode 26 and a pixel electrodesynchronously; an insulating layer 27 (may also be called as a secondpassivation layer PVX) is formed; and a second transparent conductivefilm (2nd ITO) is formed, and etched to form a second electrode 28 and acommon electrode. While for the structure that the pixel electrode is ontop and the common electrode is underneath, upon preparation, a firstelectrode 26 and a common electrode are formed by etching a firsttransparent conductive film (1st ITO), and a second electrode 28 and apixel electrode are formed by etching a second transparent conductivefilm (2st ITO).

Further, the color-filter-substrate and array-substrate cell-assemblingprocess comprises:

201, a drive voltage is applied across the first electrode and thesecond electrode;

202, a sealant is applied at edges of a color filter substrate or anarray substrate, and a cell-assembling is performed;

203, after the sealant is solidified completely, the drive voltage isremoved.

With the manufacturing method of the display panel provided byembodiments of the invention, without adding other process, a structureof electrodes in two levels is formed on the outer side of the sealantapplying region, and a fringe electric field formed by the electrodes intwo levels can act to bind up impurity ions from outside or inside thesealant in slits between the electrodes, so as to prevent these impurityions from entering the display region and bringing about an abnormalityin display.

Embodiments of the invention do not set a limit to the manner in whichthe first electrode, the insulating layer and the second electrode ofthe dustproof construction are formed, and it may be any manufacturingmanner that is well-known by those skilled in the art.

For ease of clear illustration, “first”, “second” and other words areused in the invention to distinguish categories of similar items, andthere is no restriction in terms of number put on the present inventionby the words “first” and “second”, which are merely exemplarilyillustrative of a preferred way. All similar variants or relatedexpansions, as would be obvious to those skilled in the art based on thecontents disclosed by the invention, fall into the protection scope ofthe invention.

Embodiments in the specification have each been described by using aprogressive pattern, the same or similar portions between theembodiments can have a reference to each other, and key explanations ofeach embodiment are differences with other embodiments.

Descriptions made above are merely exemplary embodiments of theinvention, but are not used to limit the protection scope of theinvention. The protection scope of the invention is determined byattached claims.

This application claims the benefit of priority from Chinese patentapplication No. 201310513051.X, filed on Oct. 25, 2013, the disclosureof which is incorporated herein in its entirety by reference as a partof the present application.

The invention claimed is:
 1. A display panel, comprising a display region and a peripheral region surrounding the display region, the peripheral region comprising a sealant applying region, wherein, a dustproof construction is provided at the peripheral region of the display panel, and the dustproof construction is located on an outer side of the display region and on an inner side of an outer edge of the sealant applying region; the dustproof construction comprises a first electrode, a second electrode, and an insulating layer interposed between the first electrode and the second electrode, and the second electrode has a plurality of patterns disconnected from each other by slits arranged between the plurality of patterns; in a direction perpendicular to the display panel, the dustproof construction and the sealant applying region are at least partially overlapped with each other, and both the first electrode and the second electrode are at least partially overlapped with the sealant applying region; the display panel comprises an array substrate that comprises a pixel electrode and a common electrode, and the pixel electrode and the common electrode are disposed in the display region; and the first electrode and the pixel electrode are disposed in a same layer, the second electrode and the common electrode are disposed in a same layer; or, the first electrode and the common electrode are disposed in a same layer, the second electrode and the pixel electrode are disposed in a same layer.
 2. The display panel according to claim 1, wherein the plurality of patterns comprise a plurality of strip electrodes.
 3. The display panel according to claim 2, wherein each of the strip electrodes has a width in a range of 3 to 5 μm, and an interval between two adjacent strip electrodes is in a range of 5 to 7 μm.
 4. The display panel according to claim 1, wherein the first electrode is a plate-like electrode.
 5. The display panel according to claim 1, wherein the dustproof construction is apart from the display region by at least 200 μm.
 6. The display panel according to claim 1, wherein the dustproof construction has a distribution area overlapping with a part of the sealant applying region.
 7. The display panel according to claim 6, wherein the dustproof construction is distributed within a range of being apart from the display region 200 to 300 μm and being apart from the outer edge of the sealant applying region 200 to 300 μm.
 8. The display panel according to claim 1, further comprising, at the peripheral region of the display panel, a first electric field control line and a second electric field control line that extend to a test connection region of the display panel, the first electrode and the second electrode being connected to the first electric field control line and the second electric field control line, respectively.
 9. The display panel according to claim 1, wherein the first electrode has a thickness in a range of 400 to 600 angstroms.
 10. The display panel according to claim 1, wherein the second electrode has a thickness in a range of 400 to 600 angstroms.
 11. The display panel according to claim 1, wherein the insulating layer has a thickness in a range of 4000 to 6000 angstroms.
 12. A display device, comprising the display panel according to claim
 1. 13. A manufacturing method of a display panel, comprising fabricating a color filter substrate, fabricating an array substrate, and cell-assembling the color filter substrate and the array substrate, wherein, fabricating the array substrate comprises: forming a gate metal layer, a gate insulating layer, a source/drain metal layer, and a passivation layer on a substrate in sequence; forming a first transparent conductive film on the substrate with the gate metal layer, the gate insulating layer, the source/drain metal layer, and the passivation layer formed thereon; through a first patterning process, forming a pixel electrode or a common electrode at a preset display region, and forming a first electrode on an outer side of the preset display region and on an inner side of an outer edge of a preset sealant applying region; forming an insulating layer; forming a second transparent conductive film; and through a second patterning process, forming the common electrode or the pixel electrode at the preset display region, and forming a second electrode on the outer side of the preset display region and on the inner side of the outer edge of the preset sealant applying region, the second electrode comprising a plurality of patterns disconnected with each other by slits arranged between the plurality of patterns, wherein, in a direction perpendicular to the display panel, a dustproof construction, which comprises the first electrode, the insulating layer, and the second electrode, and the sealant applying region are at least partially overlapped with each other, and both the first electrode and the second electrode are at least partially overlapped with the sealant applying region.
 14. The method according to claim 13, wherein the cell-assembling the color filter substrate and the array substrate comprises: applying a drive voltage to the first electrode and the second electrode; applying a sealant at edges of a color filter substrate or an array substrate, and performing cell-assembling; and removing the drive voltage, after the sealant is solidified completely. 